SPRS645F – AUGUST 2010 – REVISED OCTOBER 2013
5.19 General-Purpose Timers
The device has three 32-bit software programmable Timers. Each timer can be used as a general-
purpose (GP) timer. Timer2 can be configured as either a GP or a Watchdog (WD) or both. General-
purpose timers are typically used to provide interrupts to the CPU to schedule periodic tasks or a delayed
task. A watchdog timer is used to reset the CPU in case it gets into an infinite loop. The GP timers are 32-
bit timers with a 13-bit prescaler that can divide the CPU clock and uses this scaled value as a reference
clock. These timers can be used to generate periodic interrupts. The Watchdog Timer is a 16-bit counter
with a 16-bit prescaler used to provide a recovery mechanism for the device in the event of a fault
condition, such as a non-exiting code loop.
The device Timers support the following:
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32-bit Programmable Countdown Timer
13-bit Prescaler Divider
Timer Modes:
– 32-bit General-Purpose Timer
– 32-bit Watchdog Timer (Timer2 only)
Auto Reload Option
Generates Single Interrupt to CPU (The interrupt is individually latched to determine which timer
triggered the interrupt.)
Generates Active Low Pulse to the Hardware Reset (Watchdog only )
Interrupt can be used for DMA Event
5.19.1 Timers Peripheral Register Descriptions
Table 5-50 through Table 5-53 show the Timer and Watchdog registers.
Table 5-50. Watchdog Timer Registers (Timer2 only )
CPU WORD
ADDRESS
1880h
1882h
1884h
1886h
1888h
188Ah
188Ch
188Eh
ACRONYM
WDKCKLK
WDKICK
WDSVLR
WDSVR
WDENLOK
WDEN
WDPSLR
WDPS
REGISTER DESCRIPTION
Watchdog Kick Lock Register
Watchdog Kick Register
Watchdog Start Value Lock Register
Watchdog Start Value Register
Watchdog Enable Lock Register
Watchdog Enable Register
Watchdog Prescale Lock Register
Watchdog Prescale Register
Table 5-51. General-Purpose Timer 0 Registers
CPU WORD
ADDRESS
1810h
1812h
1813h
1814h
1815h
ACRONYM
TCR
TIMPRD1
TIMPRD2
TIMCNT1
TIMCNT2
Timer 0 Control Register
Timer 0 Period Register 1
Timer 0 Period Register 2
Timer 0 Counter Register 1
Timer 0 Counter Register 2
REGISTER DESCRIPTION
Copyright ? 2010–2013, Texas Instruments Incorporated
Peripheral Information and Electrical Specifications
Product Folder Links: TMS320C5515
145
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